IJCATR Volume 12 Issue 3

Design of a 12 bit SAR ADC with Self-Calibration

Yu Guan, Pan Luo, Bo Gou
10.7753/IJCATR1203.1007
keywords : SAR ADC; non-binary; self-calibration; capacitor array mismatch; comparator offset; intelligent sensing

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Successive approximation analog-to-digital converter (SAR-ADC) are widely used in intelligent sensing fields due to it’s low power consumption, medium and high precision and such characteristics. Traditional binary SAR ADC have non-ideal factors such as DAC capacitor array mismatch and comparator offset, which severely limit it’s performance. Therefore, a self-calibration method for non-ideal factors is proposed in this work, and theoretical derivation and simulation analysis are carried out. A 12-bit non-binary SAR ADC with self-calibration is designed based on the TSMC 40nm CMOS process, which reduces the capacitance area, improves the conversion accuracy, and eliminates most of the errors caused by non-ideal factors. Simulation results show that the ADC’s SNDR is 72.01dB, and INL within +1.2/-1LSB, meets most of the market requirements.
@artical{y1232023ijcatr12031007,
Title = "Design of a 12 bit SAR ADC with Self-Calibration ",
Journal ="International Journal of Computer Applications Technology and Research(IJCATR)",
Volume = "12",
Issue ="3",
Pages ="26 - 29",
Year = "2023",
Authors ="Yu Guan, Pan Luo, Bo Gou"}
  • The paper proposes a high resolution SAR ADC with 12b.
  • The comparator offset can be eliminated.
  • DAC capacitor mismatch error can be reduce with calibration.
  • Circuit Area is small for using the Segmented-DAC structure