Editor/Reviewer loginFrequency : 12 issues per year
Subject : Computer Applications and Technology
ISSN : 2319–8656 (Online)
IJCATR Volume 12 Issue 5
Design of Bit Width Converter Based on PCIE4.0
Linjun Liu, Hai Nie, Weiwei Ling
10.7753/IJCATR1205.1001
keywords : compatibility; Bit width selection; High speed interface; PCIE4.0
Aiming at the data bit width conversion module used in PCIE4.0 physical coding layer, this paper designs a backwards compatibility-capable implementation method, which combines the version below backwards compatibility 4.0. According to the data bit width selection signal BusWidth of MAC layer in PCIE protocol, the current running speed of PCIE is selected. So as to select the form of bit width conversion. The designed PCIE internal strobe signal is 32 bits wide, and the correctness of its coding operation mode is verified by using the description language of Verilog hardware and the joint simulation form of Verdi and VCS.
@artical{l1252023ijcatr12051001,
Title = "Design of Bit Width Converter Based on PCIE4.0",
Journal ="International Journal of Computer Applications Technology and Research(IJCATR)",
Volume = "12",
Issue ="5",
Pages ="1 - 2",
Year = "2023",
Authors ="Linjun Liu, Hai Nie, Weiwei Ling"}
A bit width conversion suitable for different versions in PCIE is proposed.
The bit width conversion between different PCIE only needs to modify the bit width part.
The clock frequency can be reduced by modifying the bit width.
The simulation results show that the PCIE working rate can be achieved by bit width conversion.